Component reuse is critical to the productivity and efficiency of SoC verification. Verification reuse involves reusing existing verification environments and components that have been previously developed for verifying other designs. It may include verification code reuse, test case reuse, and simulation script reuse, among others. You can build a reusable verification environment using well-designed verification codes and components that implement reusability techniques.
Importance of Verification Reuse
As a verification engineer, you might wonder – why should I reuse verification components? Well, the answer is quite obvious:
- As design complexity grows, and design cycle time reduces, the complexity of verifying designs rises exponentially.
- Since a typical ASIC – soc design and verification contains a host of different components, a lot of effort is spent in creating and testing these components independently before they are integrated into the SoC.
- By reusing verification IPs and components, you can boost the full system verification environment.
- Reuse enables you to focus more on system level checks instead of recreating test cases for each and every component and sub-system.
- What’s more, reusable test cases can also serve as a guide for verification engineers, who are new to the module.
- This would speed up the effort required to learn the new module, especially for modules that are highly complex.
Reusable Verification Environment Prerequisites
Building a reusable verification environment requires you to ensure certain requirements are met from the perspective of verification component users:
- Common library files must be used to ensure complete reuse across various verification environments.
- Make sure the components and environment have the ability to integrate with the design implementing the specific interface and also with other verification environments
- All design or project dependent files must be separated from the reusable files.
- Build a user-friendly interface for writing tests.
- Ensure complete and clear documentation for easy and extensive adoption.
Building a Reusable Verification Environment
The process of building a reusable verification environment begins with the verification planning phase where you need to decide the architecture of the verification environment, build test cases, schedule various tasks and distribute them among your verification engineers.
- The first and major step in the verification planning phase requires you to separate the verification environment from test cases.
- Identify components that can be reused, and mention them in the test case document.
- Make sure you collect important information like configuration attributes, dependencies between the various attributes, and the sequence of operations the design-under-test must be subjected to.
- Set the necessary verification goals, and make sure to separate the goals from the test case implementations so as to achieve reusability
- Create appropriate test cases based on various attributes such as white-box or black-box test, block-level or SoC-level test, functional or interface test, standard compliance or implementation specific test.
- According to the categories, you can then sort the tests according to their reusability.
- Build the test plan
According to leading EDA company Cadence, with verification technology advancing significantly over the last few years, SoC verification needs to be done at all levels – from system level all the way down to the silicon. Considering the verification process comprises of 50-80% of the total development effort, verification reuse can offer tremendous benefits to your verification team. Some benefits include:
- Substantial reduction in building and maintaining the verification environment
- Enhanced functional consistency
- Minimized need for deep verification expertise
- Lower verification risk
- Improved verification productivity
- Better product quality
Meeting Your Verification Needs
Verification reuse enables you to reduce effort of verification, while at the same time minimize risk and increase efficiency of your verification efforts. By following certain guidelines and implementing reuse best practices, you can create good quality reusable verification components and environment, and meet all your verification needs in this modern world of complex SoC designs.